1. Field of the Invention
This invention relates to a push-pull output circuit used for a semiconductor integrated circuit.
2. Description of the Related Art
A push-pull output circuit is used in an output circuit of a semiconductor integrated circuit which is required to have characteristics that the amplitude of the output signal is large, the distortion of the output signal is small and the output current is large.
The construction of such a push-pull output circuit is explained with reference to FIGS. 1 and 2 below. As shown in FIG. 1, a P-channel MOS transistor P1 and an N-channel MOS transistor N1 are serially connected between a power source potential Vcc and a ground potential GND to constitute a push-pull output stage circuit. An output terminal OUT is connected to a connection node between the P-channel MOS transistor P1 and N-channel MOS transistor N1. Further, a current source circuit 71, a level shift circuit 72 and an N-channel MOS transistor N2 are serially connected between the Vcc potential and GND potential. The gate of the N-channel MOS transistor N2 for output control is connected to an input terminal IN to which an input signal is supplied. A connection node Ne between the current source circuit 71 and the level shift circuit 72 is connected to the gate of the P-channel MOS transistor P1. A connection node Nf between the level shift circuit 72 and the N-channel MOS transistor N2 is connected to the gate of the N-channel MOS transistor N1.
The push-pull output circuit shown in FIG. 2 is different from that of FIG. 1 in that the level shift circuit 72 is omitted, and a P-channel MOS transistor P2 and a second current source circuit 81 are connected between the Vcc potential and the GND potential. The gate of the N-channel MOS transistor N2 is connected to the input terminal IN. A connection node Ng between the gate and drain of the P-channel MOS transistor P2 is connected to the gate of the P-channel MOS transistor P1. A connection node Nh between the first current source circuit 71 and the N-channel MOS transistor N2 is connected to the gate of the N-channel MOS transistor N1.
In the push-pull output circuit of FIG. 1, the level shift amount (a difference between the potential of the node Ne and the potential of the node Nf) of the level shift circuit 72 is fixed and cannot be adjusted. Therefore, the bias voltage (voltage between the source and gate) of the two MOS transistors P1 and N1 varies substantially in proportion to variation in the Vcc potential. As a result, an ineffective current (which is a current flowing in the MOS transistors P1 and N1 when the output terminal OUT is set in the electrically floating state; static current; DC current) flowing in the two MOS transistors P1 and N1 constituting the push-pull output stage circuit will vary. Thus, the power consumption in the push-pull output circuit varies and the characteristic of the circuit also varies. Therefore, in the push-pull circuit of FIG. 1, it is necessary to use a constant voltage source whose output voltage is stable. Further, the ineffective current flowing in the push-pull output stage circuit may be largely influenced by variation in the threshold voltage of the MOS transistors P1 and N1. When attempts are made to suppress variation in the ineffective current, the process control may become severe or the yield of the semiconductor device will be lowered.
In the push-pull output circuit of FIG. 2, the P-channel MOS transistors P1 and P2 are connected in a current mirror configuration. The gate of the P-channel MOS transistor P1 is always applied with a constant bias voltage from the gate of the P-channel MO transistor P2, thereby causing a constant current to always flow in the P-channel MOS transistor P1. As a result, the maximum value of the output current in the push-pull output circuit becomes equal to that of a constant current flowing in the P-channel MOS transistor P1. Therefore, when a large output current is required, it becomes necessary to set the ineffective current at the time of no load to a large value, causing a larger power consumption